Field
This disclosure relates to split gate memory cells and more particularly to arrays for split gate memory cells that are scalable.
Related Art
Non-volatile data storage is commonly used in integrated circuits. In one type of semiconductor device structure used for non-volatile data storage the cell includes a control gate and a select gate. When both gates are over different portions of the same channel, this type of memory cell is commonly referenced as a split gate memory cell. In this type of arrangement, the control gate is typically electrically in common for all of the memory cells for a given sector. In laying out the array for such a memory, issues include the interaction between these two gates. The select gate is particularly important for speed of access, especially reads, because they are significant to cell selection. Thus, issues relate to ensuring that the select gate has low impedance so that it can be switched between selected and deselected quickly. While speed is significant so is space. The desired speed is preferably not achieved at the cost of additional space. Speed will typically improve as the feature sizes reduce and it is desirable that a given layout not have to be greatly changed in order take advantage of the increased speed and reduced size opportunity.